WED3DG7266V-D1 1 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs febuary 2006 rev. 2 preliminary* 512mb C 64mx72 sdram, unbuffered, w/pll features pc100 and pc133 burst mode operation auto and self refresh capability lvttl compatible inputs and outputs serial presence detect with eeprom fully synchronous: all signals are registered on the positive edge of the system clock programmable burst lengths: 1, 2, 4, 8 or full page single rank 3.3v 0.3v power supply 144 pin so-dimm jedec ? d1: 31.75 (1.25") typ description the wed3dg7266v is a 64mx72 synchronous dram module which consists of nine 64mx8 sdram components in tsop ii package, and one 2kb eeprom in an 8 pin tsop package for serial presence detect which are mounted on a 144 pin so-dimm multilayer fr4 substrate. note: consult factory for availability of: ? rohs compliant products ? vendor source control options ? industrial temperature option pin names a0 C a12 address input (multiplexed) ba0-1 select bank dq0-63 data input/output clk0, clk1 clock input cb0-7 check bit (data-in/data-out) cke0 clock enable input cs0# chip select input ras# row address strobe cas# column address strobe we# #write enable dqm0-7 dqm v cc power supply (3.3v) v ss ground sda serial data i/o scl serial clock dnu do not use nc no connect * these pins are not used in this module ** these pins should be nc in the system which does not support spd. pin configurations (front side/back side) pinout pin front pin back pin front pin back pin front pin back 1v ss 2v ss 49 dq13 50 dq45 97 dq22 98 dq54 3 dq0 4 dq32 51 dq14 52 dq46 99 dq23 100 dq55 5 dq1 6 dq33 53 dq15 54 dq47 101 v cc 102 v cc 7 dq2 8 dq34 55 v ss 56 v ss 103 a6 104 a7 9 dq3 10 dq35 57 cb0 58 cb4 105 a8 106 ba0 11 v cc 12 v cc 59 cb1 60 cb5 107 v ss 108 v ss 13 dq4 14 dq36 61 clk0 62 cke0 109 a9 110 ba1 15 dq5 16 dq37 63 v cc 64 v cc 111 a10 112 a11 17 dq6 18 dq38 65 ras# 66 cas# 113 v cc 114 v cc 19 dq7 20 dq39 67 we# 68 cke1* 115 dqmb2 116 dqmb6 21 v ss 22 v ss 69 so# 70 a12* 117 dqmb3 118 dqmb7 23 dqmb0 24 dqmb4 71 s1#* 72 nc 119 v ss 120 v ss 25 dqmb1 26 dqmb5 73 nc 74 clk1 121 dq24 122 dq56 27 v cc 28 v cc 75 v ss 76 v ss 123 dq25 124 dq57 29 a0 30 a3 77 cb2 78 cb6 125 dq26 126 dq58 31 a1 32 a4 79 cb3 80 cb7 127 dq27 128 dq59 33 a2 34 a5 81 v cc 82 v cc 129 v cc 130 v cc 35 v ss 36 v ss 83 dq16 84 dq48 131 dq28 132 dq60 37 dq8 38 dq40 85 dq17 86 dq49 133 dq29 134 dq61 39 dq9 40 dq41 87 dq18 88 dq50 135 dq30 136 dq62 41 dq10 42 dq42 89 dq19 90 dq51 137 dq31 138 dq63 43 dq11 44 dq43 91 v ss 92 v ss 139 v ss 140 v ss 45 v cc 46 v cc 93 dq20 94 dq52 141 sda 142 scl 47 dq12 48 dq44 95 dq21 96 dq53 143 v cc 144 v cc
WED3DG7266V-D1 2 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs febuary 2006 rev. 2 preliminary functional block diagram dqmb0 we# dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 s0# dqm we# dq15 dq14 dq13 dq12 dq11 dq10 dq9 dq8 we# dqm s0# dq23 dq22 dq21 dq20 dq19 dq18 dq17 dq16 we# dqm s0# we# dqm s0# dq31 dq30 dq29 dq28 dq27 dq26 dq25 dq24 we# dqm s0# dq62 dq63 dq61 dq60 dq59 dq58 dq57 dq56 dq47 dq51 dq55 dq54 dq53 dq52 dq49 dq50 dq48 dq43 dq45 dq46 dq44 dq41 dq42 dq40 dq39 dq37 dq38 dq35 dq36 dq33 dq34 dq32 we# we# dqm s0# dqm s0# we# s0# dqm we# dqm s0# s0# dqmb1 dqmb2 dqmb3 dqmb7 dqmb6 dqmb5 dqmb4 i/o 0 i/o 1 i/o 2 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 i/o 3 i/o 7 i/o 6 i/o 5 i/o 4 i/o 2 i/o 1 i/o 0 i/o 3 i/o 7 i/o 6 i/o 5 i/o 4 i/o 2 i/o 1 i/o 0 i/o 3 i/o 7 i/o 6 i/o 5 i/o 4 i/o 2 i/o 1 i/o 0 i/o 3 i/o 7 i/o 6 i/o 5 i/o 4 i/o 2 i/o 1 i/o 0 i/o 3 i/o 7 i/o 6 i/o 5 i/o 4 i/o 2 i/o 1 i/o 0 i/o 7 i/o 0 i/o 1 i/o 2 i/o 4 i/o 5 i/o 6 i/o 3 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 i/o 0 i/o 1 i/o 2 i/o 0 i/o 1 i/o 2 i/o 4 i/o 5 i/o 6 i/o 7 i/o 3 cb3 cb6 cb7 cb4 cb5 cb1 cb2 cb0 v ss a0 cas# ras# cke0 v cc cke: sdram cas#: sdram ras#: sdram scl clk0 sdrams pll sda a2 a1 serial pd a0-a12: sdram a0-a12 ba0-ba1 ba0-ba1: sdram sdram sdram *clock wiring clock input sdrams *clk0 *clk1 4 or 5 sdrams 4 or 5 sdrams note: dq wiring may differ than described in this drawing however, dq/dqmb/cke/s relationships must be maintained as shown.
WED3DG7266V-D1 3 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs febuary 2006 rev. 2 preliminary absolute maximum ratings parameter symbol value units voltage on any pin relative to v ss v in , v out -1.0 ~ 4.6 v voltage on v cc supply relative to v ss v cc , v ccq -1.0 ~ 4.6 v storage temperature t stg -55 ~ +150 c power dissipation p d 9 w short circuit current i os 50 ma note: permanent device damage may occur if absolute maximum ratings are exceeded. functional operation should be restricted to recommended operating condition. exposure to higher than recommended voltage for extended periods of time could affect device reliability. parameter symbol min typ max unit note supply voltage v cc 3.0 3.3 3.6 v input high voltage v ih 2.0 3.0 v ccq +0.3 v 1 input low voltage v il -0.3 0.8 v 2 output high voltage v oh 2.4 v i oh = -2ma output low voltage v ol 0.4vi ol = -2ma input leakage current i li -10 10 a 3 note: 1. v ih (max)= 5.6v ac. the overshoot voltage duration is 3ns. 2. v il (min)= -2.0v ac. the undershoot voltage duration is 3ns. 3. any input 0v v in v ccq input leakage currents include hi-z output leakage for all bi-directional buffers with tri-state outputs. capacitance t a = 25c, f = 1mhz, v cc = 3.3v, v ref = 1.4v 200mv parameter symbol max unit input capacitance (a0-a12) c in1 40 pf input capacitance (ras#,cas#,we#) c in2 40 pf input capacitance (cke0) c in3 40 pf input capacitance (ck0) c in4 6pf input capacitance (cs0#) c in5 40 pf input capacitance (dqm0-dqm7) c in6 7pf input capacitance (ba0-ba1) c in7 40 pf data input/output capacitance (dq0-dq63) c out 9pf data input/output capacitance (cb0-7) c out1 9pf recommended dc operating conditions voltage referenced to: v ss = 0v, 0c t a +70c
WED3DG7266V-D1 4 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs febuary 2006 rev. 2 preliminary operating current characteristics (v cc = 3.3v, t a = 0c +70c) notes: 1. measured with outputs open. 2. refresh period is 64ms. version parameter symbol conditions 133/100 units note operating current (one bank active) i cc1 burst length = 1 t rc t rc (min) i ol = 0ma 1,925 ma 1 precharge standby current in power down mode i cc2p cke v il (max), t cc = 10ns 64 ma i cc2ps cke & clk v il (max), t cc = 64 precharge standby current in non-power down mode icc 2n cke v ih (min), cs v ih (min), tcc =10ns input signals are charged one time during 20 395 ma icc 2ns cke v ih (min), clk v il (max), t cc = input signals are stable 215 active standby current in power-down mode i cc3p cke v il (max), t cc = 10ns 100 ma i cc3ps cke & clk v il (max), t cc = 100 active standby current in non-power down mode i cc3n cke v ih (min), cs v ih (min), tcc = 10ns input signals are changed one time during 20ns 575 ma i cc3ns cke v ih (min), clk v il (max), tcc = input signals are stable 420 ma operating current (burst mode) i cc4 io = ma page burst 4 banks activated t ccd = 2clk 1,925 ma 1 refresh current i cc5 t rc t rc (min) 3,095 ma 2 self refresh current i cc6 cke 0.2v 180 ma
WED3DG7266V-D1 5 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs febuary 2006 rev. 2 preliminary ordering information speed cas latency height wed3dg7266v10d1xx 100mhz cl=2 31.75 (1.250") typ wed3dg7266v7d1xx 133mhz cl=2 31.75 (1.250") typ wed3dg7266v75d1xx 133mhz cl=3 31.75 (1.250") typ notes: ? consult factory for availability of rohs products. (g = rohs compliant) ? vendor speci? c part numbers are used to provide memory components source control. the place holder for this is shown as lo wer case x in the part numbers above and is to be replaced with the respective vendors code. consult factory for quali? ed sourcing options. (m = micron, s = samsung & consult f actory for others) ? consult factory for availability of industrial temperature (-40c to 85c) option 3.99 (0.157) 2.01 (0.079 min) 67.72 (2.661 max) 32.79 (1.291) 4.60 (0.181) 1.50 (0.059) 28.2 (1.112) 23.14 (0.913) 19.99 (0.787) 31.75 (1.250) max 3.81 (0.150) max. 9.91 (0.039) ( 0.004) package dimensions for d1 * all dimensions are in millimeters and (inches). industrial temperature ordering information speed cas latency height wed3dg7266v10d1i-xx 100mhz cl=2 31.75 (1.250") typ wed3dg7266v7d1i-xx 133mhz cl=2 31.75 (1.250") typ wed3dg7266v75d1i-xx 133mhz cl=3 31.75 (1.250") typ ordering information for d1
WED3DG7266V-D1 6 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs febuary 2006 rev. 2 preliminary part numbering guide wed 3 d g 7266 v xx d1 i- x g wedc memory sdram gold depth & bus width 3.3 volts clock speed (mhz) 10 = 100mhz @ cl = 2 7 = 133mhz @ cl = 2 75 = 133mhz @ cl = 3 package 144 pin so-dimm industrial temp component vendor name (m = micron) (s = samsung) g = rohs compliant
WED3DG7266V-D1 7 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs febuary 2006 rev. 2 preliminary document title 512mb - 64mx72 sdram unbuffered, w/pll revision history rev # history release date status rev a created 3-02 advanced rev 0 0.1 added pll spec 0.2 updated cap and idd specs 0.3 moved status from advanced to preliminary 0.4 removed ed from part number 0.5 moved from advanced to preliminary 6-04 preliminary rev 1 1.1 added ed to part number 7-05 preliminary rev 2 2.1 added rohs, vendor source and industrial option notes 2.2 added part number guide 2-06 preliminary
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